An interesting question here related to T2 and the SSDs is why they have the Pericom PCIe mux. It seems from the earlier section that the SSD assemblies are raw flash enclosures, or perhaps at most a custom Apple chip doing Toggle to Flash and PCIe out to the T2. One possibility is that the mux allows for one SSD slot to be unpopulated— if it is empty, the mux configues 2x the PCIe lanes to the T2 from the one populated slot. Another possibility is that mux can re-route the SSDs to the Intel PCH bypassing the T2 under some circumstances. It would be interesting to follow the traces and get the block diagram of the PCH, T2, Pericom mux, and SSDs.
Lorsqu'il en aura reçu, il pourra afficher un graphique de sa réputation au fil du temps.
Voici un aperçu de ce à quoi ressemble ce graphique :
Aucun point de réputation obtenu pour l'instant.